• High-Performance Fixed-Point Digital Signal Processor (DSP) - TMS320C62x?
  • 4-, 3.33-ns Instruction Cycle Time
  • 250-, 300-MHz Clock Rate
  • Eight 32-Bit Instructions/Cycle
  • 2000, 2400 MIPS
• C6203B and C6202 GLS Ball Grid Array (BGA) Packages are Pin-Compatible With the C6204 GLW BGA Package
• C6203B and C6202B GNZ, GNY and ZNY Packages are Pin-Compatible
• VelociTI? Advanced Very-Long-Instruction-Word (VLIW) C62x? DSP Core
  • Eight Highly Independent Functional Units:
    • Six ALUs (32-/40-Bit)
    • Two 16-Bit Multipliers (32-Bit Result)
  • Load-Store Architecture With 32 32-Bit General-Purpose Registers
  • Instruction Packing Reduces Code Size
  • All Instructions Conditional
• Instruction Set Features
  • Byte-Addressable (8-, 16-, 32-Bit Data)
  • 8-Bit Overflow Protection
  • Saturation
  • Bit-Field Extract, Set, Clear
  • Bit-Counting
  • Normalization
• 7M-Bit On-Chip SRAM
  • 3M-Bit Internal Program/Cache (96K 32-Bit Instructions)
  • 4M-Bit Dual-Access Internal Data (512K Bytes)
    • Organized as Two 256K-Byte Blocks for Improved Concurrency
• 32-Bit External Memory Interface (EMIF)
  • Glueless Interface to Synchronous Memories: SDRAM or SBSRAM
  • Glueless Interface to Asynchronous Memories: SRAM and EPROM
  • 52M-Byte Addressable External Memory Space
• Four-Channel Bootloading Direct-Memory-Access (DMA) Controller With an Auxiliary Channel
• Flexible Phase-Locked-Loop (PLL) Clock Generator
• 32-Bit Expansion Bus (XBus)
  • Glueless/Low-Glue Interface to Popular PCI Bridge Chips
  • Glueless/Low-Glue Interface to Popular Synchronous or Asynchronous Microprocessor Buses
  • Master/Slave Functionality
  • Glueless Interface to Synchronous FIFOs and Asynchronous Peripherals
• Three Multichannel Buffered Serial Ports (McBSPs)
  • Direct Interface to T1/E1, MVIP, SCSA Framers
  • ST-Bus-Switching Compatible
  • Up to 256 Channels Each
  • AC97-Compatible
  • Serial-Peripheral Interface (SPI) Compatible (Motorola?)
• Two 32-Bit General-Purpose Timers
• IEEE-1149.1 (JTAG) Boundary-Scan-Compatible
• 352-Pin BGA Package (GNZ)
• 384-Pin BGA Package (GLS)
• 384-Pin BGA Package (GNY and ZNY)
• 0.15-µm/5-Level Metal Process
  • CMOS Technology
• 3.3-V I/Os, 1.5-V Internal

TMS320C62x, VelociTI, and C62x are trademarks of Texas Instruments.
Motorola is a trademark of Motorola, Inc.
All trademarks are the property of their respective owners.
For more details, see the GLS BGA package bottom view.
IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.
TMS320C6000 and C6000 are trademarks of Texas Instruments.
Windows is a registered trademark of the Microsoft Corporation.