1. Overview6
1.1 Objective-6
1.2 Name6
1.3 History---6
2. Scope of Application---6
3. DISM Overview---7
3.1 Features-7
3.2 Support Signal Form--7
3.3 Maximum Specifications---8
3.3.1 Maximum Transmission Specifications---8
3.3.2 Maximum Transmission Line8
3.4 Referenced Standards-8
3.5 Revision History-9
4. Definition of Terms----9
5. Data Transmission Standard 1 : TMDS--10
5.1 Introduction10
5.2 TMDS Overview-10
5.2.1 Architecture---10
5.2.2 Transmission Line-11
5.2.3 Variation--12
5.3 Electrical Characteristics-12
5.3.1 DC Electrical Specifications12
5.3.2 AC Electrical Specifications13
5.3.3 Termination Resistor--14
5.3.4 DDC/USB Power Supply----14
5.4 Overview of Encoding and Decoding--15
5.5 Connector Pin Assignment----17
5.5.1 MDR type Connector 26 pin17
5.5.2 MDR type Connector 20 pin18
5.6 Data Mapping---19
5.7 Supplement-20
5.7.1 Applicable IC’s to TMDS----20
5.7.2 Compatibility between Transmitter and Receiver---21
5.7.3 Transmission Capabilities--21
5.7.4 Voltage Swing Control Resistor (REXT_SWING) and Termination Control Resistor (REXT_RES )22
6. Data Transmission Standard 2a : LVDS-23
6.1 Introduction-23
6.2 Overview----23
6.2.1 Architecture---23
6.3 Electrical Characteristics-24
6.3.1 DC Electrical Specifications24
6.3.2 AC Electrical Specifications24
6.3.3 Termination Resistor--25
6.3.4 DDC/USB Power Supply----25
6.4 Connector Pin Assignment----26
6.5 Data Mapping---27
6.6 Supplement-28
6.6.1 Applicable IC’s to LVDS28
6.6.2 Transmission Capabilities--29
6.6.3 Connector Pin Assignment and Data Mapping for 21-bit LVDS -30
7. Data Transmission Standard 2b : LDI----32
7.1 Introduction-32
7.2 Overview----32
7.2.1 Architecture---32
7.3 Electrical Characteristics-36
7.3.1 DC Electrical Specifications36
7.3.2 AC Electrical Specifications36
7.3.3 Termination Resistor--37
7.3.4 DDC/USB Power Supply----37
7.4 Connector Pin Assignment----38
7.5 Data Mapping---42
7.6 Supplement-44
7.6.1 Applicable IC’s to LVDS44
7.6.2 Transmission Capabilities--45
7.6.3 Dual/BAL Mode Application Example --46
8. Data Transmission Standard 3 : GVIF---49
8.1 Introduction-49
8.2 GVIF Overview-49
8.2.1 Block Diagram50
8.2.2 Transmission Line-50
8.2.3 Variation--51
8.3 Electrical Characteristics-51
8.3.1 DC Electrical Specifications51
8.3.2 AC Electrical Specifications52
8.3.3 Termination --52
8.3.4 DDC/USB Power Supply----53
8.4 Encode Decode--53
8.5 Connector Pin Assignment----53
8.6 Data Mapping---53
8.6.1 Data Mapping when using 1-pair ---53
8.6.2 Data Mapping when using 2-pair ---56
8.7 Supplement-59
8.7.1 GVIF IC----59
8.7.2 Transmission Capabilities for GVIF IC Sony CXB1455R ----59
8.7.3 Recommended Transfer System60
8.7.4 Recommended Transmission Line---61
9. Other Supported Signals62
9.1 DDC62
9.2 SENS Signal62
9.2.1 Definition--62
9.2.2 Electrical Characteristics---62
9.3 USB62
10. Display Signal Timing Specifications----63
10.1 Introduction----63
10.2 Definition--63
11. Software Specification--65
11.1 Overview---65
11.2 Hardware Requirements65
11.3 Detection of Display66
11.3.1 Detection Mechanism - Host----66
11.3.2 EDID66
11.3.2.1 Overview-66
11.3.2.2 Host – Monitor Interface Requirements66
11.4 Hot Plugging---67
12. Mechanical Physical Specifications-68
12.1 Introduction----68
12.2 Standard 1 Connector ---69
12.2.1 Plug Connector---69
12.2.2 Receptacle Connector71
12.3 Connector for Standard 2a--73
12.3.1 Plug Connector---73
12.3.2 Receptacle Connector74
12.3.3 Bracket---75
12.4 Connector for Standard 2b--76
12.4.1 Plug Connector---76
12.4.2 Receptacle Connector77
12.5 Connector for Standard 3----78
12.5.1 Plug Connector---78
12.5.2 Receptacle Connector79
12.6 Connector Mating Features-80
12.7 Polarization Key Mechanism81
13. Display----82
13.1 Logo Mark-82
13.2 Icon Mark--82