This document provides an overview of the MPC535/MPC536 microcontrollers， including a block diagram showing the major modular components， sections that list the major features， and differences between the MPC535/MPC536 and the MPC555. The MPC535 and MPC536 devices are members of the Motorola MPC500 RISC Microcontroller family. The parts herein will be referred to only as MPC535 unless specific parts need to be referenced.

　　1 Introduction The MPC535 device offers the following features： ? PowerPC? core with a floating point unit （FPU） and a burst buffer controller （BBC） ? Unified system integration unit （USIU）， a flexible memory controller， and improved interrupt controller ? 1 Mbyte of Flash memory （UC3F） — Typical endurance of 100，000 write/erase cycles @ 25oC — Typical data retention of 100 years @ 25oC ? 36 Kbytes of static RAM （two CALRAM modules） — 8 Kbytes of normal access or overlay access （sixteen 512-byte regions） — 4 Kbytes in CALRAM A， 4 Kbytes in CALRAM B ? A 22-timer channel modular I/O system （MIOS14） — Same as MIOS1 plus a real-time clock sub-module （MRTCSM）， 4 counter sub-modules （MCSM）， and 4 PWM sub-modules （MPWMSM） ? One TouCAN module （TouCAN_B） ? One enhanced queued analog to digital converter （QADC64E A）。 ? One queued serial multi-channel module （QSMCM A） which contains a queued serial peripheral interface （QSPI） and two serial controller interfaces （SCI/UART） ? -40°C – 85°C ambient temperature