資料介紹
The CBTU0808 is a dual lane port multiplexer designed to provide convenient and reliable
path switching for PCI Express signals. It is organized as two PCI Express lanes, each
consisting of a Transmit and Receive channel. Each channel has four ports, two (A and B)
on the source (or host) side and two (A and B) on the destination (or device) side. Each
port provides a pair of signal lines to support PCIe differential signaling.
Using specially designed high-bandwidth and high off-isolation switch elements, source
and destination ports can be connected or isolated in three possible con?gurations:
source A and B to destinations A and B respectively; or source A to destination B
(remaining ports isolated), or all ports isolated.
The switch elements are controlled by internal control logic to set switch positions in
accordance with these three con?gurations, selectable by CMOS inputs CTRL0 and
CTRL1 for lanes 0 and 1 respectively. Within a lane, the switch con?guration is always
applied identically to both transmit and receive channels.
The CBTU0808 is packaged in a 48-ball, depopulated 9 × 9 grid, 0.5 mm ball pitch, thin
pro?le ?ne-pitch ball grid array (TFBGA) package, which (while requiring a minimum
5mm × 5 mm of board space) allows for adequate signal routing and escape using
conventional board technology.
path switching for PCI Express signals. It is organized as two PCI Express lanes, each
consisting of a Transmit and Receive channel. Each channel has four ports, two (A and B)
on the source (or host) side and two (A and B) on the destination (or device) side. Each
port provides a pair of signal lines to support PCIe differential signaling.
Using specially designed high-bandwidth and high off-isolation switch elements, source
and destination ports can be connected or isolated in three possible con?gurations:
source A and B to destinations A and B respectively; or source A to destination B
(remaining ports isolated), or all ports isolated.
The switch elements are controlled by internal control logic to set switch positions in
accordance with these three con?gurations, selectable by CMOS inputs CTRL0 and
CTRL1 for lanes 0 and 1 respectively. Within a lane, the switch con?guration is always
applied identically to both transmit and receive channels.
The CBTU0808 is packaged in a 48-ball, depopulated 9 × 9 grid, 0.5 mm ball pitch, thin
pro?le ?ne-pitch ball grid array (TFBGA) package, which (while requiring a minimum
5mm × 5 mm of board space) allows for adequate signal routing and escape using
conventional board technology.
CBT
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