MM54HC147/MM74HC147
10-to-4 Line Priority Encoder
General Description
This high speed 10-to-4 Line Priority Encoder utilizes advanced
silicon-gate CMOS technology. It possesses the
high noise immunity and low power consumption of standard
CMOS integrated circuits. This device is fully buffered,
giving it a fanout of 10 LS-TTL loads.
The MM54HC147/MM74HC147 features priority encoding
of the inputs to ensure that only the highest order data line
is encoded. Nine input lines are encoded to a four line BCD
output. The implied decimal zero condition requires no input
condition as zero is encoded when all nine data lines are at
a high logic level. All data inputs and outputs are active at
the low logic level.
The 54HC/74HC logic family is functionally as well as pinout
compatible with the standard 54LS/74LS logic family.
All inputs are protected from damage due to static discharge
by internal diode clamps to VCC and ground.
Features
Y Low quiescent power consumption: 40 mW maximum at
25§C
Y High speed: 31 ns propagation delay (typical)
Y Low input current: 1 mA maximum
Y Wide supply range: 2V to 6V