密集服務器的電源解決方案

　　密度已成為計算機服務器設計中的關鍵因素。穆爾的Law已經(jīng)使有可能把多個高性能的核心到一個單一的片上系統(tǒng)（SoC）設備與支持邏輯。高密度現(xiàn)場可編程門陣列（FPGA）提供了進一步的應用加速和集成的可能性。

　　其結果是多個高性能SoC組件部署在一個系統(tǒng)中的每個邏輯板，以提供大量的計算潛力。然而，過程技術的變化，推動更高的整合已經(jīng)在服務器上的電源分配的敲門效應。

　　Processor and FPGA design teams have reduced supply voltages down to 1 V or less for the core logic as the use of higher voltages would result in damage to the high-speed transistors. Voltages in the 1.8 V to 3 V range are only used for I/O to memory and peripherals. This has led to the situation where higher current levels need to be delivered to processors and FPGAs than was the case a decade ago. This trend is ruling out the use of traditional power-conversion architectures. The high current demand would ordinarily point to the use of larger passive components able to handle the high loads and stresses. However， such larger components go against the trend to denser servers， reducing the amount of available PCB space for power-conversion circuitry. As a result， manufacturers of power converters suitable for servers have changed their approach to design.