FPGA電源需求和電源解決方案

　　現(xiàn)場(chǎng)可編程門(mén)陣列（FPGA）被發(fā)現(xiàn)在許多原型和低到中等體積的產(chǎn)品的心臟。FPGA的主要優(yōu)點(diǎn)是在開(kāi)發(fā)過(guò)程中的靈活性，簡(jiǎn)單的升級(jí)路徑，更快的上市時(shí)間，和相對(duì)較低的成本。一個(gè)關(guān)鍵的缺點(diǎn)是復(fù)雜性，F(xiàn)PGA往往將一個(gè)復(fù)雜的片上系統(tǒng)（SoC）。

　　這種復(fù)雜性對(duì)電力供應(yīng)提出了苛刻的要求。為了滿(mǎn)足這些挑戰(zhàn)，電源需要幾個(gè)輸出和效率和線性穩(wěn)壓器的清潔電源開(kāi)關(guān)穩(wěn)壓器的組合。

　　本文介紹了FPGAs的特殊功率要求，說(shuō)明如何設(shè)計(jì)一個(gè)電源，這些聰明的芯片，然后審查選擇的電源模塊針對(duì)FPGA應(yīng)用程序。

　　Calculating system power

　　Powering an FPGA can seem like powering an entire system. The power supply design engineer is faced with the challenge of supplying from three to 15 voltage rails （and sometimes even more）; and that’s only the start. FPGAs are typically fabricated using the latest wafer-fabrication techniques that require a low-core voltage， but the power supply also has to be powering multiple rails for specialty blocks and circuitry， provide multiple voltage levels， supply extra current for high-power blocks， and satisfy the requirements of noise-sensitive elements.

　　Just to make things a little more complex， even FPGAs from the same manufacturer can vary greatly， making it critical that the engineer chooses the best power supply for each chip. That choice depends on factors such as the voltage and power demands for each rail， the rails’ sequencing requirements， and system power-management needs.

　　The first step in designing an FPGA power supply is to identify the individual voltage rails and their requirements. The FPGA vendor usually supplies a “pin list” that specifies the voltage level for each powered pin that connects to a voltage rail in the device. For example， Table 1shows some of the voltage rails for Altera’s Stratix IV GX FPGA.