With even the lowest cost Spartan? FPGAs providing hundreds of thousands of gates

　　and embedded memory blocks， nearly every design is some kind of system rather

　　than just individual functions or glue logic. With so many functions integrated inside

　　a single device， how can you be sure that each is performing correctly？ Many

　　communications to FPGAs occur at a very high speed and cannot be treated as simple

　　digital Low and High levels. Continuity checks are not enough to verify circuit boards，

　　backplanes， and cables when devices are operating in excess of 100 MHz， let alone at

　　several giga-Hertz. Finally， how can you be sure that the other components connected

　　to your Xilinx device are also functioning correctly？

　　Creating a design consisting of hundreds of thousands of gates has never been easier.

　　HDL synthesis tools together with IP cores can soon fill the embedded memory blocks

　　and logic resources of a large Spartan device. In many cases， the whole system can be

　　synthesized to fit a single device， allowing you to avoid all the old issues of multi-chip

　　partitioning. Pass it through the place-and-route tools to provide a finished design，

　　and all you need is the PCB.

　　Of course， life isn‘t that simple. Regardless of design capabilities， it is very rare that a

　　design， especially a large one， will work the first time. （Your design may have been

　　100% right， but the specification may have been lacking.） Engineering is about making

　　things work， and this is where we need all the help we can get.