The MPC755 is a derivative of the MPC750 microprocessor design and is intended
primarily for use in embedded systems. All of the information in the
MPC750 RISC Microprocessor User?s Manual
applies to the MPC755 microprocessor with the exceptions
and additions noted in this document. In the event the two documents con?ict with each other, this document supersedes the information in the
MPC750 RISC Microprocessor User?s Manual.
The MPC745 is a lower-pin-count device that operates identically to the MPC755, except that it doesn?t implement the L2 cache interface. In the same way that the
MPC750 User?s Manual also describes the functionality of the MPC740, this document describes the functionality of the MPC745. All information herein applies to the MPC745, except where otherwise noted (in particular, the L2 cache information does not apply to the MPC745).