The LAN89218 is a full-featured， single-chip 10/100 Ethernet controller that has been designed to provide the highest performance possible for 32/16-bit applications. The LAN89218 includes an integrated Ethernet MAC and PHY with a high-performance SRAM-like slave interface. The simple， yet highly functional host bus interface provides a glueless connection to most common 16-bit and 32-bit microprocessors and microcontrollers. The integrated checksum offload engines enable the automatic generation of the 16-bit checksum for received and transmitted Ethernet frames， offloading the task from the CPU. The LAN89218 also includes large transmit and receive data FIFOs with a highspeed host bus interface to accommodate high bandwidth， high latency applications. In addition， the LAN89218 memory buffer architecture allows highly efficient use of memory resources by optimizing packet granularity. Applications The LAN89218 is well suited for many high performance automotive applications， including： ? Diagnostic interface （for dealership service bay） ? Fast software download interface （e.g. OBD connector） ? Gateway service interface （dealership， aftermarket repair shop） ? In-vehicle engineering development interface ? Vehicle manufacturing test interface （production plant assembly line） ? Legislated inspections （emissions check， safety inspections） The LAN89218 also supports features which reduce or eliminate packet loss. Its internal 16-kByte SRAM can hold over 200 received packets. If the receive FIFO gets too full， the LAN89218 can automatically generate flow control packets to the remote node， or assert back-pressure on the remote node by generating network collisions. The LAN89218 supports numerous power management and wakeup features. The LAN89218 can be placed in a reduced power mode and can be programmed to issue an external wake signal via several methods， including “Magic Packet”， “Wake on LAN” and “Link Status Change”。 This signal is ideal for triggering system power-up using remote Ethernet wakeup events. The device can be removed from the low power state via a host processor command. The LAN89218 integrated 10/100 MAC/PHY controller performs the function of translating parallel data from a host controller into Ethernet packets. The LAN89218 Ethernet MAC/PHY controller is designed and optimized to function in an embedded environment. All communication is performed with programmed I/O transactions using the simple SRAM-like host interface bus