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通信設(shè)計(jì)應(yīng)用

電子發(fā)燒友網(wǎng)本頻道為通信技術(shù)專欄,提供詳細(xì)的通信設(shè)計(jì)最新技術(shù)與應(yīng)用;是您學(xué)習(xí)通信技術(shù)知識(shí)的好平臺(tái)。
Three ICs Produce Pure Sine Wa

Three ICs Produce Pure Sine Wa

A TTL counter, an 8-channel analog multiplexer, and a 4th-order lowpass filter can generate 1kHz to 25kHz sine waves with a THD better than -80dB (Figure 1). The circuit cascades the two 2nd-order, continuous-time Sallen-Key filters within...

2009-04-20 標(biāo)簽:ICS 925

Creating Fast Line Transients

Creating Fast Line Transients

Creating F...

2009-04-20 標(biāo)簽:Line 1054

QuickChip Design Example 1 - A

QuickChip Design Example 1 - A

Abstract: A broadband phase-lock loop (PLL) building block integrated circuit (IC) that can accommodate signal frequencies from 0.5GHz to 9GHz is presented. The design integrates a prescaler with selectable divide ratio, a phase detector, ...

2009-04-20 標(biāo)簽:design 981

Generating Switched-Capacitor-

Generating Switched-Capacitor-

Recent advances in semiconductor-process technology and circuit-design techniques have brought down the prices of switched-capacitor filters (SCFs) by a factor of three. As an example, five-pole Butterworth low-pass filters sell for less t...

2009-04-20 標(biāo)簽:Switched-c 839

DAC and Op Amp Generate Variab

DAC and Op Amp Generate Variab

Abstract: This design idea describes a simple circuit to generate a programmable negative control voltage. It takes the output of a single supply digital-to-analog converter (DAC) and produces a variable negative voltage. The DAC output fr...

2009-04-20 標(biāo)簽:dac 806

Phase-Lock Loop Applications U

Phase-Lock Loop Applications U

Abstract: This application note discusses phase frequency detector characteristics that affect phase-locked loop (PLL) dead band and jitter performance. In PLLs that employ charge pump loop filter designs the provision of a minimum duratio...

2009-04-20 標(biāo)簽:MAX9382 1334

3V/5V DACs Support Intelligent

3V/5V DACs Support Intelligent

Abstract: This application note explains 4-20mA current loops and intelligent transmitters and explains their need for high-resolution low-power DACs. An optimum power-supply chip is not the only critical choice to be mad...

2009-04-20 標(biāo)簽:LOcurrent 1906

How Delay Lines Work

How Delay Lines Work

Abstract: This application brief describes the techniques used to build and calibrate/compensate new-generation all-silicon delay lines. Both EconOscillators and delay lines use a compensated voltage-controlled delay line (VCDL) scheme to ...

2009-04-20 標(biāo)簽:LINES 2438

跟蹤VCO技術(shù)的發(fā)展

跟蹤VCO技術(shù)的發(fā)展

摘要:本文記錄了自1910年以來壓控振蕩器(VCO)的發(fā)展歷史,給出了在RF IC中集成VCO的實(shí)例。文章闡述了相關(guān)技術(shù),并探討了產(chǎn)品性能、尺寸的演進(jìn)過程。文章還預(yù)測(cè)了未來的發(fā)展趨勢(shì)...

2009-04-20 標(biāo)簽:VCO 3366

High-Speed Pulse Generator Has

High-Speed Pulse Generator Has

Abstract: As integrated circuits (ICs) speed up, the rise/fall times of most pulse and function generators (5ns typical) become inadequate for measuring time intervals below 20ns. You can overcome this limitation with analog switches or ad...

2009-04-20 標(biāo)簽:High-Speed 1072

Digitally Controlled Sine-Wave

Digitally Controlled Sine-Wave

The circuit of Figure 1 produces an accurate variable-frequency sine wave for use as a general-purpose reference signal. It includes an 8th-order elliptic, switched-capacitor lowpass filter (IC3) that is clocked with a 100kHz square wave g...

2009-04-20 標(biāo)簽:Digitally 966

Building a Low-Cost White-Nois

Building a Low-Cost White-Nois

Abstract: A design idea for a white-noise generator is realized and revised. Two low-noise amplifiers (LNAs) in cascade amplify the noise produced by a reverse-biased Zener diode operating in junction-breakdown mode, producing white noise ...

2009-04-20 標(biāo)簽: 1250

High-Speed Random-Data Generat

High-Speed Random-Data Generat

Abstract: A handful of components are integrated into a circuit that creates a high-quality random data stream that generates eye diagrams up to 62.5MHz. The circuit diagram and eye diagram are shown. The eye diagram, one...

2009-04-20 標(biāo)簽:High-Speed 986

DVD Formats and How to Drive L

DVD Formats and How to Drive L

Abstract: This application note describes the use and features of six available DVD formats: DVD-ROM, DVD-R, DVD-RW, DVD-RAM, DVD+R, and DVD+RW. It explains how recording and rewriting work, including the bit stream coding and recording/re...

2009-04-20 標(biāo)簽:DVD 1067

Ratiometric Design Overcomes t

Ratiometric Design Overcomes t

Abstract: This application note explains how to eliminate the voltage change when a digital potentiometer is used as a voltage-divider in series with other resistors. IntroductionMechanical and electronic digit...

2009-04-20 標(biāo)簽:design 721

Stack References for Higher Ad

Stack References for Higher Ad

Abstract: This application note presents three designs that use references with digital potentiometers to adjust voltages. As the designs increase in complexity and number of references, the voltage can be adjusted even higher. The MAX5436...

2009-04-20 標(biāo)簽:DigitalPo 1257

Calculating the Error Budget i

Calculating the Error Budget i

Abstract: This application note analyses the parameters that affect the errors in precision digital-to-analog converter (DAC) applications. The analysis focuses on the factors introduced by both the data converter and the voltage reference...

2009-04-20 標(biāo)簽:Digital-to 849

New Switch Facilitates Display

New Switch Facilitates Display

New Switch...

2009-04-20 標(biāo)簽:PCIePort 1119

Analog Switch Expands I2C Inte

Analog Switch Expands I2C Inte

Abstract: Design idea outlining how to use an I2C-controlled analog switch to triple the number of devices connected to an I2C bus. Perhaps the most effective way to gain board space and increase component density is to m...

2009-04-20 標(biāo)簽:Interface 1318

Interfacing Switches and Relay

Interfacing Switches and Relay

Abstract: This note discusses the effects on switches when used to connect loads. High currents through a switch degrade its quality when used as a power switch. Both mechanical switches and relays exhibit switch bounce during operation. T...

2009-04-20 標(biāo)簽:Interfacin 2068

Implementing an Eight-to-One U

Implementing an Eight-to-One U

Abstract: Many servers need to be able to switch video, keyboard, mouse, and perhaps audio signals from one of several computers to a front panel. This application note focuses on the keyboard/mouse portion, and presents a circuit for impl...

2009-04-20 標(biāo)簽:usb 603

FDL Network Loopback Support U

FDL Network Loopback Support U

FDL Networ...

2009-04-20 標(biāo)簽:FDL 1138

如何安裝NISTnet 軟件并在此環(huán)境下配置TDMoP產(chǎn)品

如何安裝NISTnet 軟件并在此環(huán)境下配置TDMoP產(chǎn)品

摘要:本應(yīng)用筆記介紹了NISTnet軟件及其安裝,指導(dǎo)用戶如何將網(wǎng)絡(luò)接口卡配置為路由器,以及TDMoP產(chǎn)品在NISTnet下的配置。本文還示范了如...

2009-04-20 標(biāo)簽:NISTnet 1098

使用TDMoP產(chǎn)品的抖動(dòng)緩沖器補(bǔ)償報(bào)文時(shí)延差異(PDV)

使用TDMoP產(chǎn)品的抖動(dòng)緩沖器補(bǔ)償報(bào)文時(shí)延差異(PDV)

摘要:DS34T10x和DS34S10x系列TDM-over-Packet (TDMoP)芯片采用抖動(dòng)緩沖器來補(bǔ)償包網(wǎng)絡(luò)中存在的報(bào)文時(shí)延差異。本應(yīng)用筆記將解釋PDV的含義以及它如何影響通信質(zhì)量,討論抖動(dòng)緩沖器的作用...

2009-04-20 標(biāo)簽: 630

Maxim的TDM-over-Packet (TDMoP)設(shè)

Maxim的TDM-over-Packet (TDMoP)設(shè)

摘要:本應(yīng)用筆記介紹Maxim的TDM-over-Packet (TDMoP)設(shè)備與其它廠家TDMoP設(shè)備共同工作時(shí)的一些要求。這篇應(yīng)用筆記涵蓋的Maxim TDMoP芯片包括:DS34T101,DS34T102,DS34T104,DS34T108,DS34S101,DS34S...

2009-04-20 標(biāo)簽:TDMoP 2218

DS21Q44 vs. DS21Q43A

Abstract: This application note describes the hardware and software differences between the Dallas Semiconductor DS21Q44 and the DS21Q43A quad port framer devices. The DS21Q44 quad E1 framer, offers a broader feature set while retaining th...

2009-04-20 標(biāo)簽:DSDSDS21Q44 1646

DS21Q4x, DS215x, and DS21x5y T

DS21Q4x, DS215x, and DS21x5y T

Abstract: Some special functions are not derivable by using the normal transmit and receive side registers. In order to derive those functions, we need to use the test registers of the following devices: DS21Q42, DS21Q44, DS2152, DS2154, D...

2009-04-20 標(biāo)簽:DSDSDS21Q4x 1136

DS21Q42 vs. DS21Q41B

Abstract: This application note describes the hardware and software differences between the Dallas Semiconductor DS21Q42 and the DS21Q41B quad port framer devices. The DS21Q42 enhanced quad T1 framer offers a broader feature set while reta...

2009-04-20 標(biāo)簽:DS21Q42 803

Interfacing the DS21x5y to the

Interfacing the DS21x5y to the

Abstract: This application note show how to connect the DS21x5y family of single chip transceivers (SCTs) to the Texas Instruments TSM320C54x family of digital signal processors (DSPs) utilizing the buffered serial port. Both continuous an...

2009-04-20 標(biāo)簽:Interfacin 771

Tech Brief 7: DS2152 and DS215

Tech Brief 7: DS2152 and DS215

Abstract: Tech Brief 7 provides the requirements for multiplexing four PCM streams into one 8MHz system backplane using the Dallas Semiconductor/Maxim DS2152 and DS2154 T1/E1 single chip tranceivers (SCTs). The DS2155, DS26528, DS26524, DS...

2009-04-20 標(biāo)簽:DS2DS2152 1215

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